1 . | 8237A High performance programmable dma controller . | Enquiry |
2 . | Design of COFDM Transceiver Using VHDL . | Enquiry |
3 . | Design and Characterization of Parallel Prefix Adders FPGAs . | Enquiry |
4 . | implementation Convolution Encoder and Adaptive Viterbi Decoder using VHDL . | Enquiry |
5 . | An Efficient Implementation of Floating Point Multiplier . | Enquiry |
6 . | A New Reversible Design of BCD Adder . | Enquiry |
7 . | Low-Power and Area-Efficient Carry Select Adder . | Enquiry |
8 . | FPGA implementation of Binary Coded Decimal Digit Adders and Multipliers . | Enquiry |
9 . | High Speed ASIC Design of Complex Multiplier Using Vedic Mathematics . | Enquiry |
10 . | High speed Modified Booth Encoder multiplier for signed and unsigned numbers . | Enquiry |
11 . | An Efficent High Speed Wallance tree . | Enquiry |
12 . | A new hybrid Multiplieusing Dadda and Wallace method . | Enquiry |
13 . | A Decimal or Binary Multi-operand Adder using a Fast Binary to Decimal Converter . | Enquiry |
14 . | Design of Edge Detection Systems . | Enquiry |
15 . | Radix-4 and Radix-8 Booth Encoded Multi-Modulus Multipliers . | Enquiry |
16 . | New High-Speed Multioutput Carry Look-Ahead Adders . | Enquiry |
17 . | Low-power Logarithmic Number System Addition Subtraction and their Impact on Digital Filters . | Enquiry |
18 . | Implementation Of Floating Point Mac Using Residue Number System | Enquiry |
19 . | VLSI implementation of Fast Addition using Quaternary Signed Digit Number System . | Enquiry |
20 . | Viterbi-Based Efficient Test Data Compression . | Enquiry |
21 . | Hardware Implementation Of The PCM Codec For VOIP Telephony . | Enquiry |
22 . | Vending machine controller Using VHDL . | Enquiry |
23 . | 8 - bit Microcontroller Using VHDL. | Enquiry |
24 . | 16/32-bit microprocessor using VHDL . | Enquiry |
25 . | Design of Low-Error Fixed-Width Modified Booth Multiplier . | Enquiry |
26 . | Enhance Orthogonal Code Convolution Capabilities For Efficient Digital Communication . | Enquiry |